Many vision applications require high-accuracy dense disparity maps in real time. Due to the complexity of the\r\nmatching process, most real-time stereo applications rely on local algorithms in the disparity computation. These\r\nlocal algorithms generally suffer from matching ambiguities as it is difficult to find appropriate support for each\r\npixel. Recent research shows that algorithms using adaptive cost aggregation approach greatly improve the quality\r\nof disparity map. Unfortunately, although these improvements are excellent, they are obtained at the expense of\r\nhigh computational. This article presents a hardware implementation for speeding up these methods. With\r\nhardware friendly approximation, we demonstrate the feasibility of implementing this expensive computational\r\ntask on hardware to achieve real-time performance. The entire stereo vision system, includes rectification, stereo\r\nmatching, and disparity refinement, is realized using a single field programmable gate array. The highly parallelized\r\npipeline structure makes system be capable to achieve 51 frames per second for 640 Ã?â?? 480 stereo images. Finally,\r\nthe success of accuracy improvement is demonstrated on the Middlebury dataset, as well as tests on real scene
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